1. Field of Invention
The present invention relates to a flip flop (FF), particularly a pulse-based flip flop.
2. Description of Related Art
In recent years, due to the widespread availability of various mobile devices and consumer electronic products (e.g. smart-phones, digital cameras, laptops and medical use sensing systems, etc.), the design of electronic products tends to attain the design trend of low power, low working voltage, and low power leakage.
A Flip-flop (FF) is a circuit element which stores data by triggering the edge of the clock signal. The flip-flop is a high power consuming and high power leakage circuit element in that it takes around 40% to 60% of overall dynamic power consumption and power leakage of an overall system.
A pulse-based flip flop comprises a pulse generator and a data latch. Upon designing a pulse-based flip flop, dynamic power consumption is usually the only factor to be concerned while power leakage and operating voltage are not concurrently reduced. For instance, a pulse-based flip flop designed with a dynamic circuit, a domino circuit and a pre-charged circuit could hardly operate in a correct logic under a low operating voltage.
Furthermore, most data latches in the pulse-based flip flop are designed to have two inverters mutually connected, i.e., an output terminal of an inverter connected to an input terminal of the other inverter, such that current-conflicts may easily occur in data writing.
Therefore, it is necessary to design a pulse-based flip flop with low power consumption, low operating voltage and power leakage, and capable of avoiding current-conflicts.